1. Field of Invention
The present invention relates to a vertical double-diffusion MOS (VDMOS). More particularly, the present invention relates to a VDMOS that incorporates a buried channel.
2. Description of Related Art
FIG. 1 is a cross-sectional view showing a conventional vertical double-diffuision MOS (VDMOS) structure. As shown in FIG. 1, the VDMOS structure is formed by forming an epitaxial layer over a substrate 100. The epitaxial layer is doped with N+ and acts as the drain region 102 of the VDMOS. Next, an N+ doped polysilicon gate 104 is formed over the substrate 100. A channel region 106 is formed above the drain region 102. The channel region 106 and the gate 104 are separated by a gate oxide layer 108. The source region 110 is located between neighboring gates above the channel region 106. The channel region 106 further includes an N doped main region 106a, a first P-doped region 106b, and a second P-doped region 106c. The first P-doped region 106b is located between neighboring gates 104 above the main region 106a, and a portion of the first region 106b extends into a region underneath the gate 104. The second P-doped region 106c borders on the first region 106b below the source region 110 so that the second region 106c is separated from the source region 110 by the first region 106b.
In FIG. 1, a channel is formed in the VDMOS transistor when a high voltage is applied to the gate terminal 104. Therefore, electrons can flow from the source region 110 via the first region 106b and the main region 106a of the channel region 106 towards the drain region 102, thereby forming a conductive circuit. Since the N-type channel of the VDMOS transistor is formed on the surface of the first region 106b, a number of drawbacks related to an NMOS transistor will occur. Examples include the lowering of electron mobility in the channel due to the high electric field created by the gate 104, and the hot carrier effect due to the flow of a high current. These drawbacks result from the channel in the source region 110 formed by free electrons being too close to the substrate 100. When electron mobility is low, not only does the operating time of the device increase, but a larger current is also difficult to produce.
In light of the foregoing, there is a need to improve the vertical double diffusion MOS structure.